About
Magdy Abadir, Freescale Semiconductor
Magdy S. Abadir received the B.S. degree with honors in Computer Science from the University of Alexandria, Egypt in 1978, the M.S. degree in Computer Science from the University of Saskatchewan, Saskatoon, Canada, in 1981, and the Ph.D. degree in Electrical Engineering from the University of Southern California, Los Angeles, in 1986. Currently he is the manager for the Global Strategy, Tools and Methodology group of NCSG, Freescale Semiconductor. Prior to that he was the group manager for tools and methodologies of Motorola's high-performance design group in Austin, Texas. Prior to joining Motorola he was the General Manager of Best IC Labs in Austin Texas (a Burn-in and Test Engineering firm). From 1986 to 1994 he worked at the Microelectronics and Computer Technology Corporation (MCC) as a senior member of the technical staff. Dr. Abadir has co-founded and chaired a series of international workshops on the economics of design, test and manufacturing and on microprocessor test and verification. He has co-edited several books on those subjects, and he also published over 120 technical journal and conference papers in the areas of test economics, design for test, and design verification and economics. Three of his papers received best paper awards (DATE 98, ASP-DAC 2002, and DATE 2003). Dr. Abadir is an adjunct faculty at the University of Texas at Austin and he is a senior member of the IEEE.
Tim Cheng, University of California, Santa Barbara
Kwang-Ting (Tim) Cheng received the B.S. degree in Electrical Engineering from National Taiwan University in 1983 and the Ph.D. degree in Electrical Engineering and Computer Science from the University of California, Berkeley in 1988. He worked at Bell Laboratories in Murray Hill, NJ, from 1988 to 1993 and joined the faculty at the University of California, Santa Barbara in 1993 where he is currently Professor of Electrical and Computer Engineering. He served as founding Director of UCSB's Computer Engineering Program from 1999 to 2002. He has been a visiting professor at Beijin University (China) and National TsingHua University (Taiwan). His current research interests include VLSI testing, design verification and multimedia computing. He has published over 200 technical papers, co-authored three books and holds nine U.S. Patents in these areas. He has also been working closely with US industry for projects in these areas. He received Best Paper Award at the 1994 Design Automation Conf., Best Paper Award at the 1999 Design Automation Conference, 2001 Annual Best Paper Award in Journal of Information Science and Engineering, Best Paper Award in 2003 Conference of Design Automation and Test in Europe (DATE 2003), Distinguished Paper Citation at 1990 Int'l Conference on CAD, and the Best Paper Award at 1987 AT&T Conference on Electronic Testing. He is a Fellow of IEEE. He currently serves as Associate Editor-in-Chief for IEEE Design and Test of Computers and Editor of Journal of Electronic Testing: Theory and Applications. He had also served on the Editorial Board of IEEE Trans. on Computer-Aided Design. He has been General Chair and Program Chair of IEEE International Test Synthesis Workshop, Chair of Test Synthesis Technical Activities in IEEE Test Technology Technical Council and served on the technical program committees for several international conferences on CAD and test including DAC, ICCAD, ITC and VTS.
Edmund Clarke, Carnegie Mellon University
Edmund M. Clarke, FORE Systems Professor of Computer Science, Carnegie Mellon's school of Computer Science, received his Ph.D. degree in computer science from Cornell University. After teaching at Duke University and Harvard University, Clarke joined Carnegie-Mellon and became the first recipient of the FORE Systems Professorship. Clarke's research interests include software and hardware verification and automatic theorem proving, which have led to the pioneering of model checking for hardware verification. Clarke has served on the editorial boards of Distributed Computing, Logic and Computation and IEEE Transactions in Software Engineering, and is the former editor-in-chief of Formal Methods in Systems Design. Clarke is a member of the National Academy of Engineering, fellows of the Association for Computing Machinery and the IEEE Computer Society, and a member of Phi Beta Kappa.
Masahiro Fujita, University of Tokyo
Dr. Fujita received his Ph.D. from the University of Tokyo in 1985. He is a Professor in VLSI Design and Education Center (VDEC) at The University of Tokyo. Prior to joining the University of Tokyo in 2000, he was the Director of CAD in Fujitsu Laboratories of America for 6 years. He has done innovative work in the areas of digital design verification, synthesis, and testing. He has co-authored 2 books, and has over 100 publications. He has participated and chaired many prestigious conferences in CAD and VLSI designs. His current research interests include synthesis and verification in higher level design stages, hardware/software co-designs and also digital/analog co-designs.
Rajesh Gupta, University of California, San Diego
Rajesh Gupta is a professor and holder of the Qualcomm endowed chair in embedded microsystems in the Department of Computer Science & Engineering at UC San Diego, California. He received his BTech in Electrical Engineering from Indian Institute of Technology, India, MS in EECS from UC Berkeley and a Ph. D. in Electrical Engineering from Stanford University. His current research interests are in embedded systems, VLSI design and adaptive system architectures. Earlier he was on the faculty of Computer Science departments at UC Irvine and University of Illinois, Urbana-Champaign. Prior to that he worked as a circuit designer at Intel Corporation in Santa Clara, California on a number of processor design teams. He is author/co-author of over 150 articles on various aspects of embedded systems and design automation and three patents on PLL design, data-path synthesis and system-on-chip modeling. Gupta is a recipient of the Chancellor’s Fellow at UC Irvine, UCI Chancellor's Award for excellence in undergraduate research, National Science Foundation CAREER Award, two Departmental Achievement Awards and a Components Research Team Award at Intel. Gupta is editor-in-chief of IEEE Design & Test of Computers and serves on the editorial boards of IEEE Transactions on CAD and IEEE Transactions on Mobile Computing. Gupta is a Fellow of the IEEE and a distinguished lecturer for the ACM/SIGDA and the IEEE CAS Society.
Farid Najm, University of Toronto
Farid Najm, vice-chair of the University of Toronto's ECS department, received his Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign (UIUC). After working at Texas Instruments until 1992, Najm returned to UIUC to serve as a professor. His research interests include CAD for integrated circuits, with an emphasis on circuit-level issues related to power dissipation, timing, and reliability. Najm, a fellow of the IEEE, received the IEEE Transactions on CAD Best Paper Award, the NSF Research Initiation Award, and the NSF CAREER Award. He is associate editor for the IEEE Transactions on CAD and was associate editor for the IEEE Transactions on VLSI. He has served as general chairman for the ISLPED-99 conference and as technical program co-chairman for ISLPED-98. He has also served on the technical committees of ICCAD, DAC, CICC, ISLPED, and ISQED.