Products
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ESL Synthesis
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Power Optimization
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Functional Verification
- SLEC System •
- SLEC System-HLS •
- SLEC RTL •
- SLEC Pro •
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White Papers
Benefits of PowerPro Analyzer
- RTL level power analysis with gate-level-like accuracy across PVT corners provides a realistic replacement for gate-level power estimation flows
- Power analysis performed using either simulation based design switching activity or PowerPro’s vectorless mode
- Power data provided in the context of RTL source code, schematic display, design hierarchy, and various sortable reports ((ASCII, HTML, CSV, XML) to enable efficient design for low-power
- PowerPro CG and MG optimization viewing capability for complete designer understanding of PowerPro generated RTL optimizations
- Powerful graphical design visualization with cross-probing capability and flexible user configuration options to enhance user experience
- Enables use of PowerPro MG and CG for guided manual optimization of RTL code for design teams that are delivering hand optimized design solutions
PowerPro Analyzer Delivers Accurate RTL Power Analysis Results.
PowerPro Analyzer is the industry’s most accurate register-transfer level (RTL) power analysis tool. The dramatic improvement in accuracy over the obsolete solutions currently in the market is a result of several key technology developments:
- Sophisticated switching activity propagation engines which deliver precise switching activity information for all signals, including internal signals created during the synthesis process, are essential to accurate RTL power analysis. Older solutions use simplistic propagation engines that do not correlate with real circuit behavior. Calypto’s sequential analysis based propagation engines capture temporal and spatial correlations across registers that simply cannot be taken into account by obsolete, combinational analysis-based solutions.
- Accurate design prototyping to ensure the design database used for power analysis provides an accurate representation of the final synthesized design is also essential to accurate RTL power measurements. Calypto’s experts have delivered several generations of RTL synthesis and power optimization solutions and have used their expertise to enable a prototyping engine within PowerPro Analyzer that ensures the resulting measurement is very accurate compared to a gate level measurement.
- Clock trees consume a significant amount of power in a design. Understanding how to model a clock tree with a substantial amount of clock gating is therefore critical to accurate RTL power analysis. Calypto has developed significant expertise in the area of clock tree modeling during the design and development of PowerPro CG (clock gating) and has put this expertise to work in delivering accurate clock tree modeling for RTL power analysis.
PowerPro Analyzer also provides a complete view of PowerPro CG and PowerPro MG optimized designs. PowerPro Analyzer allows users to view power optimizations in the context of RTL source code, schematic display, sortable reports (ASCII, HTML, CSV, XML), and design hierarchy. All design views are hyperlinked for rapid design cross probing and analysis of the gating logic inserted by PowerPro CG and MG.
PowerPro Analyzer supports Verilog 95 and 2001 and VHDL 87, 93, &97.
